Advanced ASIC Chip Synthesis : Using Synopsys Design Compiler and PrimeTime
Book Details
Format
Hardback or Cased Book
ISBN-10
0792385373
ISBN-13
9780792385370
Publisher
Kluwer Academic Publishers
Imprint
Kluwer Academic Publishers
Country of Manufacture
GB
Country of Publication
GB
Publication Date
May 31st, 1999
Print length
312 Pages
Ksh 12,950.00
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This works describes the advanced techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.
Foreword. Preface. Acknowledgements. About the Author. 1. ASIC Design Methodology. 2. Tutorial. 3. Basic Concepts. 4. Synopsys Technology Library. 5. Partitioning and Coding Styles. 6. Constraining Designs. 7. Optimizing Designs. 8. Design for Test. 9. Links to Layout & Post-Layout Optimization. 10. SDF Generation. 11. PrimeTime Basics. 12. Static Timing Analysis. Appendix. Index.
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