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Design of Cost-Efficient Interconnect Processing Units

By: France) Coppola Grenoble Marcello (STMicroelectronics (Author) , Greece) Grammatikakis Heraklion Miltos D. (ISD SA (Author) , France) Locatelli Grenoble Cedex Riccardo (STMicroelectronics (Author)

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Ksh 26,400.00

Format: Hardback or Cased Book

ISBN-13: 9781420044713

Publisher: Taylor & Francis Inc

Publication Date: Sep 17th, 2008

Dimension: 23.40 x 15.60 x 65.70 cms

Category: Circuits & components

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Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design.

Get Design of Cost-Efficient Interconnect Processing Units by Marcello (STMicroelectronics, Grenoble, France) Coppola at the best price and quality guranteed only at Werezi Africa largest book ecommerce store. The book was published by Taylor & Francis Inc and it has pages. Enjoy Shopping Best Offers & Deals on books Online from Werezi - Receive at your doorstep - Fast Delivery - Secure mode of Payment

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