Die-stacking Architecture
Book Details
Format
Paperback / Softback
Book Series
Synthesis Lectures on Computer Architecture
ISBN-10
3031006194
ISBN-13
9783031006197
Publisher
Springer International Publishing AG
Imprint
Springer International Publishing AG
Country of Manufacture
GB
Country of Publication
GB
Publication Date
Jun 10th, 2015
Print length
113 Pages
Ksh 6,300.00
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The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors.
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.
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