Embedded SoPC Design with NIOS II Processor and Verilog Examples
by
Pong P. Chu
Book Details
Format
Hardback or Cased Book
ISBN-10
1118011031
ISBN-13
9781118011034
Publisher
John Wiley & Sons Inc
Imprint
John Wiley & Sons Inc
Country of Manufacture
US
Country of Publication
GB
Publication Date
May 29th, 2012
Print length
782 Pages
Weight
1,484 grams
Dimensions
25.20 x 18.40 x 4.50 cms
Ksh 21,750.00
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0 in stock
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Fast
* Offers experiment problems with various levels of difficulties in the end of each chapter. * Provides Complete code listing. * Offers Multi-week projects in the end of each chapter. * Includes annotated bibliographic notes for further reading.
Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well?allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks. Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, Embedded SoPC Design with Nios II Processor and Verilog Examples takes a "learn by doing" approach to illustrate the hardware and software design and development process by including realistic projects that can be implemented and tested on the board. Emphasizing hardware design and integration throughout, the book is divided into four major parts: Part I covers HDL and synthesis of custom hardwarePart II introduces the Nios II processor and provides an overview of embedded software developmentPart III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) cardPart IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.
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