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Hardware Architectures for Post-Quantum Digital Signature Schemes
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Hardware Architectures for Post-Quantum Digital Signature Schemes

2021 ed.

Book Details

Format Hardback or Cased Book
ISBN-10 3030576817
ISBN-13 9783030576813
Edition 2021 ed.
Publisher Springer Nature Switzerland AG
Imprint Springer Nature Switzerland AG
Country of Manufacture GB
Country of Publication GB
Publication Date Oct 28th, 2020
Print length 170 Pages
Weight 460 grams
Dimensions 16.30 x 24.20 x 1.70 cms
Ksh 18,000.00
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This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification.  The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;Enables designers to build hardware implementations that are resilient to a variety of side-channels.

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