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Tradeoffs and Optimization in Analog CMOS Design
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Tradeoffs and Optimization in Analog CMOS Design

Book Details

Format Hardback or Cased Book
ISBN-10 0470031360
ISBN-13 9780470031360
Publisher John Wiley & Sons Inc
Imprint Wiley-Interscience
Country of Manufacture GB
Country of Publication GB
Publication Date Jun 27th, 2008
Print length 632 Pages
Weight 1,168 grams
Dimensions 17.60 x 25.30 x 3.90 cms
Product Classification: Semi-conductors & super-conductors
Ksh 18,550.00
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Optimizing Analog CMOS Design presents methods for the optimized design of analog CMOS circuits through the design choices of Metal-Oxide Semiconductor Field-Effect Transistor device drain current, inversion level, and channel length.

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