Research Infrastructures for Hardware Accelerators
Book Details
Format
Paperback / Softback
Book Series
Synthesis Lectures on Computer Architecture
ISBN-10
3031006224
ISBN-13
9783031006227
Publisher
Springer International Publishing AG
Imprint
Springer International Publishing AG
Country of Manufacture
GB
Country of Publication
GB
Publication Date
Nov 20th, 2015
Print length
85 Pages
Weight
212 grams
Dimensions
19.00 x 23.50 x 0.90 cms
Ksh 4,500.00
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Envisioning future computing systems with a diverse set of general-purpose cores and accelerators, computer architects must add accelerator-related research infrastructures to their toolboxes to explore future heterogeneous systems.
Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently. Historically, the computer architecture community has focused on general-purpose processors, and extensive research infrastructure has been developed to support research efforts in this domain. Envisioning future computing systems with a diverse set of general-purpose cores and accelerators, computer architects must add accelerator-related research infrastructures to their toolboxes to explore future heterogeneous systems. This book serves as a primer for the field, as an overview of the vast literature on accelerator architectures and their design flows, and as a resource guidebook for researchers working in related areas.
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