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System-on-Chip Test Architectures

By: USA) Wang CA Sunnyvale Inc. Laung-Terng (SynTest Technologies (Author) , U.S.A.) Stroud AL Auburn Charles E. (Auburn University (Author) , U.S.A.) Touba TX Austin Nur A. (University of Texas (Author)

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Ksh 11,950.00

Format: Hardback or Cased Book

ISBN-13: 9780123739735

Publisher: Elsevier Science & Technology

Publication Date: Jan 8th, 2008

Weight: 1602 grams

Dimension: 24.20 x 19.90 x 3.80 cms

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A guide to VLSI Testing and Design-for-Testability techniques that allows students, researchers, DFT practitioners, and VLSI designers to master System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. It also includes practical problems at the end of each chapter for students.

Get System-on-Chip Test Architectures by Laung-Terng (SynTest Technologies, Inc., Sunnyvale, CA, USA) Wang at the best price and quality guranteed only at Werezi Africa largest book ecommerce store. The book was published by Elsevier Science & Technology and it has pages. Enjoy Shopping Best Offers & Deals on books Online from Werezi - Receive at your doorstep - Fast Delivery - Secure mode of Payment

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