Book Details
Format
Paperback / softback
ISBN-10
9813346442
ISBN-13
9789813346444
Edition
2021 ed.
Publisher
Springer Verlag, Singapore
Imprint
Springer Verlag, Singapore
Country of Manufacture
GB
Country of Publication
GB
Publication Date
Jan 8th, 2022
Print length
330 Pages
KSh 21,600.00
Currently unavailable
0 in stock
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Quality
Fast
This book describes simple to complex ASIC design practical scenarios using Verilog. It also covers architecture design strategies, multiple clock domain designs, low-power design techniques, DFT, pre-layout STA and the overall ASIC design flow with case studies.
This book describes simple to complex ASIC design practical scenarios using Verilog. It builds a story from the basic fundamentals of ASIC designs to advanced RTL design concepts using Verilog. Looking at current trends of miniaturization, the contents provide practical information on the issues in ASIC design and synthesis using Synopsys DC and their solution. The book explains how to write efficient RTL using Verilog and how to improve design performance. It also covers architecture design strategies, multiple clock domain designs, low-power design techniques, DFT, pre-layout STA and the overall ASIC design flow with case studies. The contents of this book will be useful to practicing hardware engineers, students, and hobbyists looking to learn about ASIC design and synthesis.
Get ASIC Design and Synthesis by Vaibbhav Taraate at the best price and quality guaranteed only at Werezi Africa's largest book ecommerce store. The book was published by Springer Verlag, Singapore and it has 330 pages.
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