Book Details
Format
Paperback / softback
ISBN-10
9811513163
ISBN-13
9789811513169
Edition
2020 ed.
Publisher
Springer Verlag, Singapore
Imprint
Springer Verlag, Singapore
Country of Manufacture
GB
Country of Publication
GB
Publication Date
Jan 30th, 2021
Print length
251 Pages
KSh 13,500.00
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0 in stock
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This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design.
This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike.
Get Logic Synthesis and SOC Prototyping by Vaibbhav Taraate at the best price and quality guaranteed only at Werezi Africa's largest book ecommerce store. The book was published by Springer Verlag, Singapore and it has 251 pages.
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